大电容负载下的高速、低功耗动态摆率增强电路研究
A Universal High-Speed、 Low-Power Dynamic Slew-Rate Enhancement Circuit for Large Capacitancer
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摘要: 本文提出了一种针对大负载电容的高速、低功耗动态摆率增强电路设计方法.电路通过直接监测主运算放大器输入端的差分电平变化,实现对主放大器的动态电流补偿,较大幅度地提高了摆率增强效果.通过改变核心MOS管尺寸,可以实现对摆率增强电路开启阈值的调节.通过引入开关控制,可以实现对摆率增强电路的及时“休眠”,提高电路的能效.动态摆率增强电路与主运算放大器为并行关系,因此适用于所有结构的运算放大器,通用性强.电路采用0.35μm商业CMOS工艺实现,有效芯片面积0.15×0.15mm2.采用5V单电源供电,测试结果表明,本电路针对400pF大负载电容,可以实现7V/μs的正向摆率及10V/μs的负向摆率,功率消耗6.25μW.该方法与传统的电路结构相比,工作效率显著提高.Abstract: This paper presents a new class of universal high-speed, low-power dynamic slew-rate enhancement (SRE) circuit for heavy capacitive load.The circuit is directly driven by the transient of input signals, which monitor the slewing condition of the main op-amp.Accordingly, the slewing performance is dynamically boosted.The proposed circuit parallels the main op-amp, thus can be used in all types of op-amps.Power consumption is greatly saved by driving the SRE circuit into sleeping state when slewing boosting is completed.The circuit is designed and fabricated in 0.35 μm commercial process, occupying 0.15×0.15 mm2 chip area.The circuit operates with a single 5 V supply.The experimental results show that 7 V/μs positive slew-rate and 10 V/μs negative slew-rate are achievable for 400 pF load capacitance, with 6.25 μW power dissipation.Comparing with traditional SRE circuits, the slewing boosting efficiency is greatly improved.