Abstract: Post-bond Through Silicon Via (TSV) test can effectively improve the performance and yield of 3D ICs. Although existing test methods have high test capabilities for open and bridge faults, their effectiveness for testing leakage faults is poor, and the total test time is long. To address this issue, a post-bond TSV test method based on the voltage divider circuit is proposed. This proposed method designs a voltage divider circuit that can form an uninterrupted current path during leakage fault testing, effectively improving the test capabilities for leakage faults. In addition, the current paths of testing open and leakage faults do not interfere with each other, so this method can test open and leakage faults of adjacent TSVs simultaneously. Experimental results demonstrate that this proposed method can test weak leakage faults below 10 kΩ and maintain high test capabilities even under process variations. Compared to similar test methods, this method has a smaller area overhead and less total test time.