VLSI Implementation of Cell Search Algorithm for IEEE 802.16e System

Cell search is one of the key technologies in IEEE 802.16e system.In this paper, a new VLSI architecture for a low-complexity fast cell search and integer frequency offset estimation combined algorithm is proposed.The proposed architecture uses the approaches of differential demodulation in frequency domain to compensate for the channel impairments.The composed modules of the architecture are described in detail and the architecture is implemented in an Altera EP2S130 device.Simulation results show that the maximum operating frequency is 103.7MHz, and it can be applied in IEEE 802.16e receiver or other similar communication systems.